2005 RESEARCH TOPICS
|Cognitive Radio||Advanced communication system design with Xilinx ISE and Core Generator||Software: VHDL, Xilinx ISE
Hardware: Xilinx FPGA
|Embedded Processor System Design||Embedded processor system design with Xilinx soft microprocessor - MicroBlaze||Software: VHDL, Xilinx ISE
Hardware: Xilinx FPGA
|RFID||Design of RFID and SmartCard middleware application for unified user authentication/asset tracking||Software: Linux, C/C++, Java|
|VOIP||VOIP implementation on Orbit platform||Software: Linux, C/C++, Socket Programming|
|Arbitrary Waveform Generation and Capture||Web based signal design and generation scripting by using Agilent instrumentation and .NET platform||
Software: .NET, C/Java, MS Windows
|802.11 Monitoring||802.11 monitoring and dirstibuted packet capture/analysis||Software: XML, DHTML, SQL , Java|
|Vehicular Traffic Monitoring||Design and Prototype a system that estimates traffic congestion from in-bus GPS receivers||Software: Linux, C, XML, Java|
|Long-range 802.11||Develop a long-range 802.11 point-to-point link using of the shelf access points||Software: Linux device drivers, C/C++, Socket programming|
|802.11 Security||The aim of this project is exposing several security flaws that come "built-in" with 802.11 as well as to design and develop a wireless honeypot
||Software: Linux device drivers, C/C++, Socket programming|
|Robotic Mobility||Robotic platform imlementation of various ORBIT related mobility models||Software: Linux, C, XML, Java|
|802.11 Interference Generator||Implement Aetheros chipset based 802.11 interference generator||Software: Linux device drivers, C/C++, Socket programming|
This project will take students through the process of designing a prototype hardware system on a Xilinx FPGA Development Board. Field Programmable Gate Array, or FPGA is a programmable logic device consisting of thousands to tens of thousands of gates and can be used to prototype Integrated Circuit designs for a variety of applications, be it networking, data, imaging or voice. These project will make use of the Xilinx FPGA Design Platform and will involve the implementation of some of the blocks provided by the Xilinx Core Library, such as the Digital Synthesizer, Numerically Controlled Oscillator or Digital Down Converter along with other hardware modules that are required to build a complete working system. Xilinx ISE software will be used to implement the steps in the hardware design flow - starting from design specification, design synthesis, implementation to programming the end Xilinx FPGA device. The system will be verified by performing behavioral, structural and timing simulations using Logic Simulators and finally on-board testing will be carried out to validate the design.
This project will involve the use of the Embedded Processor Development Kit provided by Xilinx, particularly the implementation and application of its 32-bit soft microprocessor, MicroBlaze. MicroBlaze, an embedded soft core, is a reduced instruction set computer (RISC), optimized for implementation in a Xilinx FPGA. The hardware components of the system consist of MicroBlaze soft core along with other hardware blocks defined by the user and implemented on the target FPGA. The software components of the system consist of the software platform created by Xilinx tools along with application software written by the user.
RFID is the buzz word in today's technology market. There are countless commercial as well as academic applications that can be derived from this technology, when used in conjunction with the right set of application infrastructure on the top. In Winlab, we'd like to use RFID for multiple purposes like:
- Asset tracking and inventory management.
- Use SmartCards (a card wih programmable memory) for auto-login at terminals.
- Applications to access human asset via communication devices, based on the current location reported by the RFID tag & Reader.
RFID has been around for a while. A good example is the EZ-Passs technology. But the recent advancements in RFID and SmartCard space has made it worth a look for deployment in small organizations too. This would require:
- In-depth reading and understanding of the technology.
- Identifying the standards, both for RFID-tags, SmartCards and the corresponding readers.
- Identify or pick one of the apove applications.
- Design and implement this application over the summer.
Just as security policies for the wired network exist in organizations, with the growing deployment of 802.11 bases access mechanisms, there is a growing concern amongst network administrators, to ensure that the network is secure. However, unlike the wired network where one needs to be plugged into a jack in order to gain access, in the wireless network, the intruders/war drivers need not be physically located on the premises Thus, there is a growing need for a wireless monitoring solution that continously monitors the wireless environment, detects any inconsistencies and can pre-empt any DOS attacks.This project is motivated by this requirement and the goal is to design a wireless monitoring system that can be deployed on laptops or smaller embedded platforms ( and hence is small enough to fit into 128MB Compact Flash cards) and have the capability of capturing, reporting and storing sniffed information on a per packet basis into a database
Steps involved (or things that you will learn on the way even if you dont know):
- Knowledge of 802.11 drivers (Cisco Aironet , Prism2 and Atheros based cards)
- How to put the cards in monitoring mode
- Understand RF monitoring
- Capture packets and report to database
- Build a database and interface for the monitoring application to report information to the database
- Ability to view reported information in real-time (optional)
The 802.11 wireless local area network (WLAN) standard, is widely used and forms the basis behind every WLAN product, whether it is wireless interface cards used on a laptop or the access points that serve these laptops.
Unfortunately, the medium access control or MAC sublayer of this standard also serves as an example of faulty protocol design in which security has been added as an afterthought, rather than being incorporated from the ground up, leaving gaping security holes. Students will be asked to scrutinize every aspect of the 802.11 MAC protocol so as to come up with, and implement, innovative ways to "break"
the protocol. In the second phase, the students will design a wireless honeypot system. A honeypot is defined as : "An information system resource whose value lies in unauthorized or illicit use of that resource". Students will create a wireless network, with a single AP and one or more other computers, solely to attract attackers/intruders. Using a dedicated data capturing mechanism they will log all unauthorised activity on this network. The network ideally should have automated traffic generated on it to resemble a normal network, to fool a passive observer. Students will have to also play the attacker and demonstrate an unauthorised use of this network and the logs tracking this use. Example setups could use a real AP with some simple security settings or a fake (software) AP complete with a fake web based management interface which attracts hackers trying to change the network configuration (while logging the details of any such attempt).
There is a widespread belief that traffic congestion can be alleviated by providing drivers (or their navigation systems) with more timely information about traffic jams. In the future, this information could be gathered over a wireless network from in-vehicle GPS receivers. This project can make use of the GPS receivers and the future ORBIT wireless network available on the Rutgers bus system. Students will design the system and build the application that computes real-time traffic congestion from GPS location traces.
Wireless network research benefits from being able to raise the noise floor through interference generators, because the radio range is scaled down so that experiments can be conducted in a smaller space. This project explores using standard 802.11 radios based on the Atheros chipset as interference generators. Students will modify the linux device driver to enable interference generation and test a variety of interfere positions and strengths for effectiveness.